Thermal networks: why the chip has more than one time constant.

1. Scope and thermal coordinates

A processor package contains several paths for heat transport and several volumes that store heat. A compact thermal network replaces this distributed structure with a finite set of temperatures, thermal capacitances and conductances. It is useful when those states resolve the dynamics required by the application. Adding states alone does not establish accuracy: parameters, boundary conditions and observed quantities must also be defined.

The following example uses two storage nodes connected to a fixed-temperature bath. The first represents a heat-source region and the second a downstream package region. Temperature rises θ₁ and θ₂ are measured relative to the constant bath temperature. Both start at zero. All parameters are illustrative and constant; lateral spreading, radiation, fluid transport delay and temperature-dependent material properties are excluded.

2. Derivation from the energy balance

Let C₁ and C₂ denote thermal capacitances in J/K. R₁ is the resistance between the nodes and R₂ the resistance from node two to the bath, both in K/W. Electrical dissipation P enters node one as heat. The inter-node heat flow is (θ₁ − θ₂)/R₁. It leaves the first storage volume and enters the second with exactly the opposite sign.

Every term in the nodal equations has units of watts. Adding both balances cancels the internal heat flow and gives d(C₁θ₁ + C₂θ₂)/dt = P − θ₂/R₂. This cancellation is an immediate consistency check. At steady state the bath removes the entire input: θ₂ = PR₂ and θ₁ = P(R₁ + R₂). The stored sensible-heat change is C₁θ₁ + C₂θ₂, measured in joules.

3. Local RC products and system modes

For one isolated first-order storage element connected through one resistance, τ = RC is the response time constant. In a coupled ladder, changing either temperature affects both balances. The system time constants therefore follow from the eigenvalues of the complete state matrix A, rather than from separately multiplying each layer resistance by its nearby capacitance.

Choose C₁ = C₂ = 10 J/K and R₁ = R₂ = 0.1 K/W. Both branch products equal one second. The resulting matrix is A = [[−1, 1], [1, −2]] s⁻¹. Its characteristic polynomial is λ² + 3λ + 1, with coefficients carrying the corresponding inverse-time units. The eigenvalues are (−3 ± √5)/2 s⁻¹. The two positive decay times are consequently 2.618034 s and 0.381966 s. Neither equals one second.

4. A reproducible power-step example

Apply a constant 100 W step at time zero, retaining the parameters above. The steady-state temperature rises are 20 K at the source and 10 K downstream. With zero initial rise, the exact linear-system solution is θ(t) = θ∞ − exp(At)θ∞. This expression can be evaluated by diagonalizing the two-by-two matrix or by a matrix-exponential routine.

For comparison, consider a one-state approximation with the correct final source rise but an arbitrarily selected one-second time constant: θ̂₁(t) = 20[1 − exp(−t/1 s)] K. At one second it predicts 12.642 K instead of 6.993 K. The 5.649 K discrepancy is an error of this explicitly chosen approximation, not a universal error bound for one-state models. A different fitted time constant could improve one interval while retaining error elsewhere.

5. What measurements can establish

A Foster representation expresses a measured thermal response as a sum of exponential terms. A Cauer representation uses a ladder topology. Equivalent realizations can describe the same external thermal impedance; a Foster model is not inherently a one-state model. Internal nodes gain physical interpretation only when the network and its parameters have been related to the device and its boundary conditions. These distinctions are documented in semiconductor thermal-model references [1, 2].

For identification, record the actual dissipated-power profile, reference temperature, sensor locations, timestamps and measurement bandwidth. Fit on one set of transients and evaluate different transients separately. Report the temperature error over the time horizon of interest, including the earliest resolved response and the approach to equilibrium. A sensor too slow to resolve the fast mode cannot establish that the mode is absent.

The numerical example is reproducible without any device-specific data. Form C = diag(10, 10) and K = [[10, −10], [−10, 20]], calculate A = −C⁻¹K, and solve Kθ∞ = [100, 0]ᵀ. Evaluate the displayed matrix-exponential expression at each tabulated time. Checks are θ(0) = 0, the initial source slope P/C₁ = 10 K/s, the final rise [20, 10] K and zero residual in both steady-state balances. These checks test arithmetic and implementation consistency; they do not replace comparison against an independently measured physical system.

6. Implications and limits

The calculation establishes why thermal model order should follow the input-output dynamics required by the task. A model adequate for minute-scale outlet-temperature planning can still omit a mode important for a subsecond source-temperature estimate. Conversely, retaining every material layer is unnecessary when its contribution to the relevant output is demonstrably negligible over the assessed operating range.

The illustrative network does not resolve three-dimensional hotspots or determine actual processor thermal margins. Variable coolant temperature, flow-dependent conductance, sensor filtering and multiple heat sources require extensions and new validation. The defensible conclusion is narrower and useful: evaluate coupled modes and the selected output before assigning a single thermal time constant.